A read-only memory (ROM) is a type of memory in which data can be permanently stored, for example, by blowing metallic links during programming thereof. Such type of memory can be conventionally accessed at specific locations to read the programmed contents thereof. A much more versatile type of ROM is the electrically programmable read-only memory (EPROM) which can be electrically programmed to store data. Some versions of these devices store data permanently; others, however, can be erased with ultraviolet light or an electrical current.
The construction of an EPROM cell is similar to that of a field effect transistor, but additionally includes a floating gate between the gate conductor and the conduction channel of the transistor. During programming to store a desired logic state, electrons flowing in the conduction channel are attracted and trapped in the floating gate. This condition increases the threshold voltage of the transistor, thereby rendering it cutoff in response to normal read operation voltages. Hence, during reading of a transistor cell so programmed, the transistor will remain nonconductive and thus represent a high impedance between the source and drain. On the other hand, cells which have not been programmed will remain conductive in response to normal read operation voltages. In this manner, the memory can be programmed.
To program the EPROM cell, a relatively large voltage is applied to the control gate, the drain is biased to 6 to 8 volts while the source is grounded. The channel current which flows between source and drain is on the order of 1 to 5 milliamps. This appreciable current load necessitates the use of an external power supply, typically 12 volts. One example of a EPROM which is programmed as discussed above is described by B. Eitan in U.S. Pat. No. 4,639,893.
In portable PC applications and some system designs, there is a growing interest in nonvolatile memories which use a single 5 volt power supply. One EPROM cell which can be programmed with five volts is described by R. Kazerounian et.al. ("A 5 Volt High Density Poly-Poly Flash Erase EPROM Cell", IEDM, 1988). This cell consists of a single self-aligned split gate EPROM device and a shared poly erase gate. This invention requires a separate gate (wordline) which is used during write, read and erase. This additional gate increases the cell area. Both this cell and the one described in the U.S. Pat. No. 4,639,893 patent are built using rather involved, non-standard processes.
As discussed above, one problem has been the need for a power supply other than the five volt supply already found in most memory systems. Another problem faced in prior art methods where a multi-cell array exists is bitline stress, which is the deprogramming of already written cells during the programming of other cells sharing the same bit line. Accordingly, improvements which overcome any or all of the problems are presently desirable.